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| 型号： | 1215E |
| 英文描述： | TEST/JTAG SUPPORT|CMOS|QFP|48PIN|PLASTIC |
| 中文描述： | 测试/ JTAG支持|的CMOS | QFP封装| 48PIN |塑料 |
| 文件页数： | 89/92页 |
| 文件大小： | 1041K |
| 代理商： | 1215E |
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Agere Systems Inc.
9
User Manual
April 2001
Advanced Operational Mode
497AE and 1215E Boundary-Scan Master 2
Architecture of the BSM2 (continued)
TCK Generator and Gating
TCK Generator
The BSM2 derives the TCK signal for a selected/
attached B-S TAP from the Master Clock input signal
(TCKIN) via a divider called the TCK Generator (Figure
1). The TCK Generator can be programed to divide the
Master Clock by 2n with 0
≤ n ≤ 7. The value of n is pro-
gramed in the CDIV[2:0] bits of the CSC register.
TCK Gating
The default state of the TCK signal is free-running, with
a divide by 128 of the TCKIN signal. It can be set to a
gated mode, in which TCK only operates when scan-
ning or moving from TAP state to state. TCK is gated off
when the TAP State Tracker (below) is in the idle state
or the scan destination state or when data overflow or
underflow conditions exist.
Automatic TMS Generator
In the normal mode (nonmanual), the TMS signal pat-
tern is provided from an internal circuit that automati-
cally determines the pattern based on the current state,
the desired scan operation (e.g., data register scan),
and the destination state. In the automatic pause mode,
if there is data overflow or underflow, the automatic
TMS generator commands the TAP Controllers of the
selected/attached B-S chain to move to the appropriate
Pause-
xR state [or, if so programmed, pause via gating
the clock signal on TCK (see above)] automatically until
the condition is corrected.
TAP State Tracker
This functional block controls the signals produced by
the BSM2 on its TMS output pin. By doing so, at any
time during scan operation, the TAP State Tracker can
provide to BSM2 internals the current TAP Controller
state of the TAP Controllers on the selected/attached
B-S chain. When a scan operation is initiated, the then
current TAP Controller state (according to the TAP
State Tracker) is used as the initial state of a sequence
of states passing through the desired scan state (pro-
grammed by the controlling processor) and terminating
in a target state (programmed by the controlling pro-
cessor).
This method of scan sequence programming differs
from that implemented in the original BSM (497AA).
For more about BSM2 scan operation, see the descrip-
tion under the heading The BSM2 Scan Process. For
more about the registers used to program the BSM2
Interrupt Control
Interrupt control is achieved by programming the inter-
If any of these bits has the value 0, the interrupt signal,
INT*, will not respond to the relevant interrupt-provok-
ing stimulus. The value of one of these bits is 1, it will
bring INT* low (active) according to the occurrence of
the relevant stimulus.
Interrupt servicing software must scan all relevant sta-
tus bits to determine the event that generated the inter-
rupt. It is often appropriate to set the mask bits to 0
while eliminating the cause of an interrupt.
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