参数资料
型号: XR18W750IL48-F
厂商: Exar Corporation
文件页数: 26/44页
文件大小: 0K
描述: IC WIRELESS UART CTRLR 48QFN
标准包装: 260
功能: 控制器
RF 型: 通用
次要属性: I²C 接口
封装/外壳: 48-VFQFN 裸露焊盘
包装: 托盘
其它名称: 1016-1473
XR18W750IL48-F-ND
XR18W750
WIRELESS UART CONTROLLER
REV. 1.0.0
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See Table 11 for parity selection summary below.
? Logic 0 = No parity.
? Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR bit-4 selects the even or odd parity format.
? Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
? Logic 1 = EVEN Parity is generated by forcing an even number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format.
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
? LCR BIT-5 = logic 0, parity is not forced (default).
? LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit is forced to a logical 1 for the transmit and receive
data.
? LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit is forced to a logical 0 for the transmit and receive
data.
T ABLE 11: P ARITY SELECTION
LCR B IT -5 LCR B IT -4 LCR B IT -3
P ARITY SELECTION
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
No parity
Odd parity
Even parity
Force parity to mark, “1”
Forced parity to space, “0”
LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space", LOW state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
? Logic 0 = No TX break condition (default).
? Logic 1 = Forces the transmitter output (TX) to a “space”, LOW, for alerting the remote receiver of a line
break condition.
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL and DLM) enable.
? Logic 0 = Data registers are selected (default).
? Logic 1 = Divisor latch registers are selected.
5.7
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
26
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