参数资料
型号: TFA9812HN
厂商: NXP SEMICONDUCTORS
元件分类: 音频/视频放大
英文描述: 15 W, 2 CHANNEL, AUDIO AMPLIFIER, PQCC48
封装: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT619-8, HVQFN-48
文件页数: 20/66页
文件大小: 386K
代理商: TFA9812HN
TFA9812_2
NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 22 January 2009
27 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplier with I2S input
[1]
[2]
Window Protection is only checked at power-up.
9.
I2C bus interface and register settings
9.1 I2C bus interface
The TFA9812 supports the 400 kHz I2C bus microcontroller interface mode standard. This
can be used to control the TFA9812 and to exchange data with it when in I2C control
mode, see Section 8.2.1.
The TFA9812 can operate in I2C slave mode only as slave receiver or a slave transmitter.
The serial hardware interface involves the pins of the TFA9812 as described in Table 22.
Voltage values applied to the I2C bus device address pins are interpreted as described in
9.2 I2C bus TFA9812 device addresses
Table 24 shows the register address options for the TFA9812 as part of the 8-bit byte that
contains the device address as well as the bit indicator read/write_not R/!W. The TFA9812
supports four different addresses, each of which can be congured using the pins
ADSEL1/PLIM1 and ADSEL2/PLIM2, see Table 22.
OFP
PLL frequency > 140 MHz
Floating
OFP
Floating
Restart (fault to operating
when
PLL frequency < 140 MHz)
IBP
BCK/WS is not 32
± 2,
48 2 or 64 2
Floating
-
Floating
Restart (fault to operating
when BCK/WS is 32
± 2,
48 2 or 64 2)
Table 21.
Overview protections …continued
Protections
Symbol Conditions
DIAG
pin
I2C
ag[1]
Output
Recovering
Table 22.
I2C pins in I2C control mode
Pin name
Description
SCL/SFOR
I2C bus clock input
SDA/MS
I2C bus data input and output
ADSEL2/PLIM2
I2C bus device address bit A2
ADSEL1/PLIM1
I2C bus device address bit A1
Table 23.
I2C pin voltages in I2C control mode
Logic value
Voltage A2/A1
0< VIL
1> VIH
Table 24.
I2C bus device address
(MSB)
Bit
(LSB)
11010A2
A1
R/!W
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